An LLC series-resonant converter (LLC-SRC) has found widespread applications in power supply devices, because of its advantages over other types of converters. For example, its design is relatively simple, and can achieve the zero voltage switching (ZVS) operation of the primary MOS (metal-oxide semiconductor) and the zero current switching (ZCS) operation of the secondary MOS in a full load range, thereby enhancing the system efficiency.
However, the output current of the LLC-SRC has a “half-chord” waveform. Additionally, when the switching frequency is lower than the resonant frequency, the current of the secondary MOS is un-continued and its peaks are relatively high, which increase not only the predefined/specification values of component currents, but also the conduction losses of the converter.
The conventional LLC-SRC has drawbacks of which the output current has large ripples. In order to meet relatively same output voltage ripples of a conventional PWM converter and requirements of the current ripples of the capacitor, the outputs need to be parallel-coupled to a number of capacitors. To apply the LLC-SRC in strong current situations, it is necessary to adapt an interleaving mode, that is, two or N LLC-SRCs are parallel-connected/interleaved. Using a control circuit to make the switches of each LLC-SRC driven with a 90° or 180°/N shift may effectively reduce the output current ripples and increase the frequency of the output current ripples, thereby reducing the number of the output capacitors, lowering the specifications of the power switching elements, so as to achieve the goal of reducing costs and increasing the output power and the power density while still having the advantages of the LLC-SRC ZVS and ZCS.
The parallel-interleaved LLC-SRC is applicable to power supplies of high power and high current. The parallel-interleaved LLC-SRC mainly refers to a converter in which the outputs of two or more LLC-SRCs are parallel-connected and coupled to a common output filter capacitor. When two LLC-SRCs are interleaved, there are two types of input connections: one is that the inputs are parallel-connected, which is adapted for the low input voltages and used only for power amplification. The other is that the inputs are series-connected, where a three-phase PFC is generally coupled prior to the inputs. Accordingly, the use of switches with lower voltage stress meets the requirements of high input voltages. In the two-phase interleaved LLC-SRC, the distribution of the rectifier outputs at the secondary side is symmetrical relative to the common output capacitor, whereby the amplitudes of the output currents of the rectifiers in the two phases are equal, while and phases are shifted at 90°. After the output currents are superpositioned, an output current of the output capacitor with small ripples can be achieved.
However, in practice, the length difference of the conductive wires transmitting the rectifier outputs of the secondary sides of the two-phase interleaved LLC-SRC to the common output capacitor may result in different parasitic resistances and parasitic inductances therein, thereby inevitably causing the asymmetry of the output currents. Consequently, the amplitude and phase shifts are generated in the two-phase rectifier output currents, which result in the increase of the ripple current of the output capacitor, and deteriorating the parallel-interleaved effect.
In the low-voltage and strong-current applications, due to product specifications, each parallel-interleaved LLC-SRC may have two or more transformers. Considering the limitation of the current stress of the rectifier MOS and the cost, each LLC-SRC may have two or more corresponding rectifiers. If the layouts of the transformers and rectifiers are not appropriated, the interleaving effect will be greatly reduced.
Therefore, a heretofore unaddressed need exists in the art to address the aforementioned deficiencies and inadequacies.